Avery Design Debuts CXL Validation Suite
Tewksbury, MA, February 28, 2023 — Avery Design Systems, a leader in functional verification solutions, today announced a new validation suite supporting the Compute Express Link™ (CXL™) open industry-standard interconnect. It enables rapid and thorough system interoperability, validation and performance benchmarking of systems targeting the full range of versions of the CXL standard, including 1.1, 2.0…
Avery Design Systems and CoMira Announce Partnership To Enable UCIe-Compliant Chiplet Design
Avery to offer VIP, verification aids to facilitate UCIe-compliant solutions from connectivity expert CoMira Solutions Tewksbury, MA – January 25, 2023 – Avery Design Systems, a leader in functional verification solutions, and high-speed connectivity IP innovator CoMira Solutions today announced a partnership aimed at enabling chiplet design using the UCIe (Universal Chiplet Interconnect Express) die-to-die interface standard.…
Avery Design Systems Announces SimXACT-SA™ for Improved Sequential X-Verification
TEWKSBURY, MA., December 6, 2022 – Avery Design Systems Inc., an innovator in functional IC verification productivity solutions, today announced the availability of a major new release to its patented SimXACT™ analysis solutions, adding features for sequential false X analysis and automatic repair and improved analysis and debug of clock gating logic. The new release…
Siemens expands industry-leading integrated circuit verification portfolio with acquisition of Avery Design Systems
Siemens plans to add Avery’s technology to the Siemens Xcelerator portfolio as part of its industry-leading suite of electronic design automation (EDA) integrated circuit (IC) verification offerings. Acquisition will extend Siemens’ enterprise verification platform, adding Avery‘s Verification Protocol and Compliance Test Suite offerings Customers can optimize quality and reduce time-to-market by utilizing Siemens’ verification solution…
Avery Continues to Drive CXL Adoption with New Virtual Platform Features in Support of Version 3.0
Tewksbury, MA., October 25, 2022 — Avery Design Systems, the leader in functional verification solutions, continues to drive the industry adoption of the Compute Express LinkTM (CXL™) open industry-standard interconnect, introducing new features in its QEMU software virtual machine emulator based Linux host and SoC RTL co-simulation solution for system-level verification of complete CXL HW-SW systems.…
Avery Announces 800G Ethernet VIP virtual network co-simulation platform, enabling SoC pre-silicon validation in real networked application environments
Fully tested VIP can be leveraged in virtual networking scenarios and across all network stack layers and protocols, accelerating verification closure SANTA CLARA, CA At the Flash Memory Summit (#FMS2022) – August 2, 2022 – Avery Design Systems today announced that its fully-tested Verification IP (VIP) for 800Gbps Ethernet can now be used to perform virtual…
Mobiveil and Avery Design Systems extend partnership to accelerate design and verification of NVMe 2.0-enabled SSD development
MILPITAS, CALIF. –– August 2, 2022 –– Mobiveil, Inc and Avery Design Systems today announced an expanded partnership to help customers accelerate NVMe based SSD design and verification. The complementary IP/VIP solution combines Mobiveil’s design IP for NVM Express, DDR4 and LDPC IPs with Avery’s verification IPs for NVMe, DDR4 and ONFI and NVMe virtual…