Avery CXL VIP provides a comprehensive verification solution featuring an advanced UVM environment that incorporates constrained random traffic generation, robust packet, link, and physical layer controls and error injection, protocol checks and coverage, functional coverage, protocol analyzer-like features for debugging, and performance analysis metrics. With the advanced capabilities of Avery VIP, engineers can work more efficiently, develop more complex tests, and work on more complex topologies, such as multi-path, multi-link solutions. Avery compliance testsuites offer effective corethrough-chip-level tests, including those used in compliance workshops as well as extended tests developed by Avery to cover the specification features


  • CXL BFMs
  • Compliance test suites
  • User Guide

Tech Specs

Short description: CXL VIP
Provider: Avery Design Systems
Languages Supported: SystemVerilog
Compliant Standard: CXL Specification 1.1, 2.0
Maturity: Production
Availability: Now

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  • Dynamically configurable BFMs supporting CXL Core Specification 1.1 and 2.0
  • PCIe 5.0 Base Specification
  • CXL Host, Repeater, and Device agents
  • Multi-level protocol trackers makes debugging faster
  • Functional coverage tracks commands and device states
  • Comprehensive assertions track CXL compliance checklist coverage and isolate DUT bugs faster
  • Comprehensive directed and constrained random compliance testsuite achieves high protocol coverage