SD-Xactor is a comprehensive VIP solution portfolio for SDIO 4.0 and UHS-II used by SoC and IP designers to ensure comprehensive verification and protocol and timing compliance. SD-Xactor implements a complete set of models, protocol checkers, and compliance testsuites in 100% native SystemVerilog and UVM.
Deliverables
- SD host BFM
- Compliance testsuite
- User Guide
Features
- Perform bring-up of I/O Aware and Non-I/O Aware, Non-UHS-II and UHS-II, and Combo devices and supports bus modes and speeds including SPI, 1-bit & 4-bit SD Data (HS, LS), and UHS-II (FD: 2D1U-FD, 1D2U-FD, 2D2U-FD and 2L-HD)
- Supports all commands including erase, trim, sanitize, discard, and write protect commands, power modes including legacy power down (SD memory) and suspend/resume (SDIO Card), and UHS-II Hibernate, and suppots SDIO interrupt modes
- Host and Device models can be used in active and monitor only modes and supports bypass mode to skip power-on reset
- Open and unencrypted timing class models all timing parameters (randomize, modifiable)
- SV constraint set on all transaction classes generates rich set of normal and error packets
- Host randomly configures SD DUT including card registers, function extension registers, CIA
- Inject errors at all layers through callbacks
- Comprehensive protocol and timing checks track compliance checklist coverage and isolate DUT bugs faster
- Tracker log monitors all levels and improves debug
- Comprehensive directed and constrained random compliance testsuite achieves high protocol coverage