Your Solution To MIPI UniPro and M-PHY Compliance Validation
Highlights
- Complete solution for UniPro and M-PHY core through chip-level verification
- Host, Device, M-PHY models
- Comprehensive assertions track UniPro compliance coverage
- Functional coverage tracks range of packet traffic, FSMs, and complex operational sequences
- Tracker log monitors all levels and improves debug
- Compliance testsuite for Transport, Network, Link, and Physical layer verification of Host, Device, PHY
- Native SystemVerilog implementation
- Supports SystemVerilog UVM/OVM/VMM environments
- Proven with multiple IP vendors
Compliance
- UniPro 1.6
- M-PHY 3.0
Models
- UniPro Model Emulates UniPro protocol stack layers and M-PHY
- Supports all service primitives (SAP) and service data units (x_SDU)
- DME User supports all sequences of control, configuration, and status primitives
- Transport service
- Allocates connections between CPorts
- Supports up to 2047 Cports
- Schedules message transfers between CPort Users
- Performs SAR of messages and frames to/from L3
- Supports E2E FC
- Allocates connections between CPorts
- Schedules message transfers between CPort Users
- Supports CPort signal interface
- Supports UniPro Test Feature
- Callbacks at each layer enables user to access frames and layer management primitives Inject errors (modify, add, delete frames)
- Extensive protocol checking built into models
M-PHY Model
- Multiple LANE provisions
- LS-MODE and HS_MODE
- LS-MODE NRZ and PWM signalling schemes
- Multiple power saving modes
Compliance Testsuites