NUVIA Selects Avery Design for Next Generation PCIe® Verification
March 12, 2021 03:23 PM Eastern Standard Time
TEWKSBURY, Mass.–(BUSINESS WIRE)–Avery Design Systems, leader in functional verification solutions today announced NUVIA who is reimagining silicon in a new way, creating compute platforms that redefine performance for the modern data center, has deployed Avery PCIe Verification IP (VIP) for subsystem and SoC verification.
“After evaluating several verification IP solutions for the verification of our PCIe interfaces, we determined that Avery VIP was the best solution, allowing us to achieve our verification requirements while offering excellent capabilities and expert services and support.”
“Creating high performance, low power processors and highly integrated complex SoCs requires advanced verification tools and methods to validate designs at all levels from IP to subsystems to full SoC,” said Matthew Page, Senior Director of CAD/IT at NUVIA. “After evaluating several verification IP solutions for the verification of our PCIe interfaces, we determined that Avery VIP was the best solution, allowing us to achieve our verification requirements while offering excellent capabilities and expert services and support.”
“We are grateful to be a part of NUVIA’s advanced verification strategy,” said Chris Browy, vice president sales/marketing of Avery. “We are working with NUVIA’s verification team to fully utilize our solutions for PCIe Gen5 including models, compliance testsuites, and expert services to help streamline IP and SoC verification.”
Availability & Additional Resources
The complete line-up of high speed protocols including PCIe Gen6, CXLTM 2.0, CCIX®, Gen-ZTM VIP are available today.
About Avery Design Systems
Founded in 1999, Avery Design Systems, Inc. enables system and SOC design teams to achieve dramatic functional verification productivity improvements through the use of formal analysis applications for gate-level X-pessimism verification and real X root cause and sequential backtracing; and robust core-through-chip-level Verification IP for PCI Express, CXL, CCIX, Gen-Z, USB, AMBA, UFS, MIPI CSI/DSI, I3C, DDR/LPDDR, HBM, ONFI/Toggle/NOR, NVM Express, SATA, AHCI, SAS, eMMC, SD/SDIO, CAN FD, and FlexRay standards. The company has established numerous Avery Design VIP partner program affiliations with leading IP suppliers. More information about the company may be found at www.avery-design.com.
Compute Express Link and CXL are trademarks of the CXL Consortium
PCI Express and PCIe® are trademarks of PCI-SIG
Gen-Z is a trademark of the Gen-Z Consortium