Avery Design Systems Announces NVMe 1.3 and NVMe-MI Verification IP Updates
Tewksbury, MA, 3 August 2017 Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced availability of updates to its NVMe VIP supporting NVMe 1.3 and support for new NVMe-Management Interface (NVMe-MI) over PCIe 4.0 or SMBus 3.0. The NVMe VIP now supports the NVMe 1.3 standard including enhancements to models, protocol…
Avery Design Systems Unveils MIPI I3C VIP Targeting Sensors in Smartphone, IoT, Automotive Designs
TEWKSBURY, MA., June 15, 2017 Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced availability of MIPI I3CSM Verification IP (VIP) supporting the MIPI I3CSM sensor interface specification used for smartphones, wearables, Internet of Things (IoT) devices and automotive camera systems based on MIPI CSI-2SM. I3C-Xactor VIP supports master and slave…
Avery Design Systems Unveils DDR5 VIP Solution Targeting DDR5 Design Ecosystem
TEWKSBURY, MA., June 14, 2017 Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced availability of DDR5 Verification IP (VIP) solution targeting the DDR5 ecosystem players including memory, chip set, and IP vendors. DDR-Xactor VIP supports DDR5 SoC, memory controller, and DFI-PHY designs SDRAM memory chip models DFI-PHY model Memory controller…
Avery Design Systems Targets Accelerator Applications With Verification Solutions for CCIX, AMBA 5 CHI, and PCIe 4.0
Tewksbury, MA, 6 June 2017 Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced availability of several new verification IP solutions including the Cache Coherent Interconnect for Accelerators (CCIX), an open chip-to-chip interconnect standard, major updates to the company’s flagship PCI Express® (PCIe®) 4.0 VIP for CCIX over PCIe and PCI-SIG®…
Rambus, PLDA and Avery Design Announce Comprehensive PCIe 4.0 Solution
Silicon-proven sub-system enables easy integration with pre-validated PHY, controller and verification IP SUNNYVALE, Calif. – May 17, 2017 – Rambus Inc. (NASDAQ:RMBS), today announced it is collaborating with PLDA, the industry leader in PCI Express® controller IP solutions, and Avery Design Systems Inc., an innovator in functional verification productivity solutions, to offer a comprehensive, silicon-proven…
Avery Design Systems Focuses on Ultra HD Display VIP Portfolio
TEWKSBURY, MA., February 27, 2017 – Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced availability its expanded Display VIP portfolio including support for HDMI 2.0b, DisplayPort 1.4, Embedded DisplayPort (eDP) 1.4b, DSI-2, and DSC 1.2. Today’s display technologies support an array of advanced consumer electronics, personal computers, automotive infotainment, and…
Ride with the Verify Seven: The Next-Gen Verification Leaders on EDA, Technology — Making It in Today’s Environment
REDWOOD CITY, CA–(Marketwired – Feb 16, 2017) – WHO: The Electronic System Design Alliance (ESD Alliance) and OneSpin Solutions WHAT: Will co-host a panel, “Ride with the Verify Seven,” moderated by Jim Hogan of Vista Ventures featuring six well-known verification leaders who grew their companies from startup to medium-sized industry player WHEN: Monday, February 27,…