Trilinear Technologies and Avery Design Systems Team on DisplayPort IP Solutions
TEWKSBURY, MA., March 1, 2018 – Semiconductor intellectual property (IP) providers Avery Design Systems, Inc. and Trilinear Technologies, Inc. have signed a partnership agreement to provide DisplayPort Interface IP products developed by Trilinear along with DisplayPort verification IP (VIP) products developed by Avery. “As the DisplayPort standard matures, the verification of DisplayPort systems is becoming…
Metrics Partners with Avery to Expand Cloud Verification with Robust VIP Portfolio
Pay-by-Minute SaaS Solution Dramatically Enhances Verification Productivity OTTAWA, Ontario and TEWKSBURY, MA, February 23, 2018 — Metrics Technologies and Avery Design Systems today announced the results of their collaboration to enable Avery’s Verification IP to run on Metrics Cloud Simulator & Verification Manager. The combined pay-by-minute SaaS Solution dramatically improves both resource utilization and engineering…
Avery Design Systems Announces SimXACT 5.0 for Improved X-Verification
TEWKSBURY, MA., February 23, 2018 – Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced availability of release 5.0 of its patented SimXACT analysis solutions including major new features for analyzing and automatically eliminating X bugs in gate-level design simulation. SimXACT automates the tedious process of analyzing X propagations in gate-level…
Avery supporting the development of commercial Gen-Z VIP as 1.0 specification is released
BEAVERTON, Ore.–(BUSINESS WIRE)–The Gen-Z Consortium, an organization developing an open standard interconnect designed to provide high-speed, low latency, memory-semantic access to data and devices, today shared the Gen-Z Core Specification 1.0 is publicly available on its website. “The release of core specification 1.0 today is a significant step towards realization of new architectures and evolution…
Micron, Rambus, Northwest Logic and Avery Design to Deliver a Comprehensive GDDR6 Solution for Next-Generation Applications
Comprehensive solution including memory, PHY, Controller and Verification IP for ASIC and FPGA to enable GDDR6 adoption beyond graphics BOISE, Idaho, Jan. 23, 2018 (GLOBE NEWSWIRE) — Micron Technology, Inc. (NASDAQ:MU), a leading memory and storage provider, today announced with Rambus Inc., Northwest Logic and Avery Design, their efforts to deliver a comprehensive solution for…
Codasip and Avery Partner to Improve Regression Test Methodology of RISC-V Processor
Brno, Czech Republic – November 8th 2017 – Codasip, the leading supplier of RISC-V® embedded CPU cores, today announced its partnership with Avery Design Systems, the provider of cutting-edge verification intellectual property (VIP) solutions for SoC and IP companies. Codasip develops licensable RISC-V processors, the Berkelium (Bk) series, via a unique customization tool called Codasip…
INVECAS, Inc. and Avery Design Systems Collaborate on LPDDR4/3 PHY, VIP Solutions
TEWKSBURY, MA., 28 September 2017 – Avery Design Systems Inc., a leader in verification IP, today announced its collaboration with INVECAS, Inc. to facilitate interoperability of DDR-Xactor VIP and perform extended compliance validation using Avery DFI-PHY compliance test-suite. “We are pleased to collaborate with Avery Design VIP Partner to support the validation of our multi-standard…