News

SK Hynix, Amkor Technology, eSilicon, Northwest Logic and Avery Design Systems Announce “Start Your HBM/2.5D Design Today” Webinar

Webinar will bring content from recent high-bandwidth memory seminar to a worldwide audience San Jose, California — March 15, 2016 — SK Hynix, Amkor Technology, eSilicon, Northwest Logic and Avery Design Systems recently presented a live seminar in the Bay Area discussing High Bandwidth Memory (HBM) designs implemented with 2.5D technology. The event was very…

SK hynix, Inc., Amkor Technology, Inc., eSilicon, Northwest Logic and Avery Design Systems Announce “Start your HBM/2.5D Design Today” Seminar

The seminar will present a complete HBM supply chain solution San Jose, California — February 4, 2016 — SK hynix, Inc. (“SK hynix”), Amkor Technology, Inc., eSilicon, Northwest Logic and Avery Design Systems have joined forces to offer a complete High Bandwidth Memory (HBM) supply chain solution. HBM is a JEDEC-defined standard that utilizes 2.5D technology…

Avery, CAST, and Rianta Roll Together on Automotive Ethernet and CAN FD IP and VIP solutions

TEWKSBURY, MA., November 10, 2015 – Avery Design Systems Inc., an innovator in functional verification productivity solutions, Rianta Solutions, Inc., a Verification IP provider and System-on-Chip (SoC) integration specialist, and CAST, Inc., a semiconductor intellectual property (IP) provider, today announced they are combining their strengths to develop and deliver superior solutions for the design and…

Northwest Logic Uses Avery Design System’s High Bandwidth Memory (HBM) Model to Verify Its High-Performance HBM Controller IP Core

TEWKSBURY, MA., November 10, 2015 – Northwest Logic Inc., a leader in high-performance digital IP Cores and Avery Design Systems, a leader in Verification IP (VIP) solutions, today announced that Northwest’s High Bandwidth Memory (HBM) Controller Core has been verified utilizing Avery’s HBM memory model.  In addition, Northwest Logic is using Avery DIMM and component…

Avery Design Systems Takes Focus on MIPI CSI and DSI VIP Solutions

TEWKSBURY, MA., June 8, 2015 – Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced availability of MIPI VIP supporting the DSI-2, CSI-2 v2.0, C-PHY v1.1, and D-PHY v1.2 standards. This expands Avery’s comprehensive MIPI VIP portfolio which already includes UFS, UFSHCI, Unipro, M-PHY, and Soundwire. CSI and DSI VIP supports…

Avery Design Systems Unveils DDR4 3DS LRDIMM VIP Solution

TEWKSBURY, MA., June 8, 2015 – Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced availability of DDR4 3D Stacking (3DS) support for its DDR4 memory chip and LRDIMM Verification IP (VIP) models and compliance testsuites. DDR-Xactor VIP supports: • SDRAM memory chip models • RDIMM/LRDIMM models including RCD and DB…

PLDA and Avery Design Systems Cooperate on PCI Express

TEWKSBURY, MA, March 2, 2015 – Avery Design Systems Inc., a leader in verification IP, today announced PLDA and Avery Design Systems have engaged in collaboration to facilitate interoperability of PCI-Xactor VIP and XpressRICH IP and perform extended compliance validation using Avery PCIe compliance test-suite. “We have been pleased to collaborate with Avery Design to…