Astera Labs Verifies Its System-Aware PCI Express® 5.0 Smart Retimer Using Avery Design Systems PCIe® 5.0 Verification IP
Tewksbury, MA., June 18, 2019 — Avery Design Systems, leader in functional verification solutions today announced that Astera Labs successfully utilized Avery’s Peripheral Component Interconnect PCI Express® (PCIe®) 5.0 Verification IP and services to verify its breakthrough system-aware PCIe 5.0 Smart Retimer. The Avery PCIe 5.0 VIP supports models and testsuites for the newly ratified…
Avery Design Systems Announces SymXprop for X Accurate RTL Simulation
TEWKSBURY, MA., May 30, 2019 – Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced availability of SymXprop that performs high accuracy semi-formal based RTL X handling to eliminate the inherent inaccuracies in logic simulators. “Design practices involving partial reset, uninitialized memories, and clock and power gating expose SystemVerilog’s inaccurate RTL…
Avery Design Systems Announces SimCluster GLS to Accelerate Gate-Level Sign-Off Simulations
TEWKSBURY, MA., May 30, 2019 – Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced availability of SimCluster GLS that performs gate-level parallel simulation to achieve 3-5X speed up of sign-off simulations. “As chips get larger the feasibility of performing post-layout SDF-based gate-level simulation gets harder and harder,” said Chris Browy,…
Silvaco, Inc. and Avery Design Systems Partner to Deliver Complete CAN-FD Automotive and MIPI I3C IP and VIP Solutions
TEWKSBURY, MA. And SANTA CLARA, Calif., 25 February 2019 – Avery Design Systems Inc., a leader in verification IP, today announced its partnership with Silvaco, Inc. for distribution of Avery’s MIPI I3C-Xactor VIP for sensor interfaces used in smartphones, IoT devices and camera systems, and CAN-FD/LIN/FlexRay Xactor VIP for automotive network applications. Silvaco performs comprehensive…
Avery Design Systems Pairs PCIe® and NVM Express® VIP with Teledyne LeCroy Summit™ Protocol Exercisers
August 06, 2018 08:36 PM Eastern Daylight Time TEWKSBURY, Mass.–(BUSINESS WIRE)–Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced integration of the company’s flagship PCI Express® (PCIe®) and NVM Express® (NVMe) VIP solutions with Teledyne LeCroy Summit Z3-16™and Z416™ Protocol Exercisers enabling post-silicon, at-speed bring-up and validation and debug of PCIe 4.0 and NVMe…
Mobiveil and Avery Design Systems Partner to Provide SoC Designers a Fully Verified and Compliant PCIe 5.0 IP Solution
MILPITAS, CALIF. (PRWEB) JUNE 05, 2018 Mobiveil, Inc. today announced that it is partnering with Avery Design Systems to deliver a complete PCIe 5.0 IP solution for SoC designers needing a fully verified and compliant PCIe 5.0 interface solution for their designs. Mobiveil will provide root complex, endpoint, and switch configurations of controller IP with SR·IOV…
Avery Design Systems Fast Tracks PCI Express 5.0 VIP
June 01, 2018 11:30 AM Eastern Daylight Time TEWKSBURY, Mass.–(BUSINESS WIRE)–Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced availability of major updates to the company’s flagship PCI Express® (PCIe®) 5.0 and PIPE 5.1 VIP solution. The PCIe 5.0 VIP supports the latest new features including 32 GT/s speed, Equalization updates,…