News

Avery supporting the development of commercial Gen-Z VIP as 1.0 specification is released

BEAVERTON, Ore.–(BUSINESS WIRE)–The Gen-Z Consortium, an organization developing an open standard interconnect designed to provide high-speed, low latency, memory-semantic access to data and devices, today shared the Gen-Z Core Specification 1.0 is publicly available on its website. “The release of core specification 1.0 today is a significant step towards realization of new architectures and evolution…

Micron, Rambus, Northwest Logic and Avery Design to Deliver a Comprehensive GDDR6 Solution for Next-Generation Applications

Comprehensive solution including memory, PHY, Controller and Verification IP for ASIC and FPGA to enable GDDR6 adoption beyond graphics BOISE, Idaho, Jan. 23, 2018 (GLOBE NEWSWIRE) — Micron Technology, Inc. (NASDAQ:MU), a leading memory and storage provider, today announced with Rambus Inc., Northwest Logic and Avery Design, their efforts to deliver a comprehensive solution for…

Codasip and Avery Partner to Improve Regression Test Methodology of RISC-V Processor

Brno, Czech Republic – November 8th 2017 – Codasip, the leading supplier of RISC-V® embedded CPU cores, today announced its partnership with Avery Design Systems, the provider of cutting-edge verification intellectual property (VIP) solutions for SoC and IP companies. Codasip develops licensable RISC-V processors, the Berkelium (Bk) series, via a unique customization tool called Codasip…

INVECAS, Inc. and Avery Design Systems Collaborate on LPDDR4/3 PHY, VIP Solutions

TEWKSBURY, MA., 28 September 2017 – Avery Design Systems Inc., a leader in verification IP, today announced its collaboration with INVECAS, Inc. to facilitate interoperability of DDR-Xactor VIP and perform extended compliance validation using Avery DFI-PHY compliance test-suite. “We are pleased to collaborate with Avery Design VIP Partner to support the validation of our multi-standard…

Avery Design Systems Announces NVMe 1.3 and NVMe-MI Verification IP Updates

Tewksbury, MA, 3 August 2017 Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced availability of updates to its NVMe VIP supporting NVMe 1.3 and support for new NVMe-Management Interface (NVMe-MI) over PCIe 4.0 or SMBus 3.0. The NVMe VIP now supports the NVMe 1.3 standard including enhancements to models, protocol…

Avery Design Systems Unveils MIPI I3C VIP Targeting Sensors in Smartphone, IoT, Automotive Designs

TEWKSBURY, MA., June 15, 2017 Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced availability of MIPI I3CSM Verification IP (VIP) supporting the MIPI I3CSM sensor interface specification used for smartphones, wearables, Internet of Things (IoT) devices and automotive camera systems based on MIPI CSI-2SM. I3C-Xactor VIP supports master and slave…

Avery Design Systems Unveils DDR5 VIP Solution Targeting DDR5 Design Ecosystem

TEWKSBURY, MA., June 14, 2017 Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced availability of DDR5 Verification IP (VIP) solution targeting the DDR5 ecosystem players including memory, chip set, and IP vendors. DDR-Xactor VIP supports DDR5 SoC, memory controller, and DFI-PHY designs SDRAM memory chip models DFI-PHY model Memory controller…