PLDA® Announces Robust Verification Toolset, Increasing Design Accuracy and Reducing Time-to-Production for Next Generation SoCs with CXL®, PCIe® 6.0 or Gen-Z® Interconnect
PLDA, the industry leader in PCI Express® IP and data interconnect solutions, today announced the Robust Verification Toolset, a breakthrough approach to IP verification dramatically increasing Design accuracy and speeding-up the time-to-market. The verification process for IP design takes place at the front end of chip design and requires a high level of reliability to…
ESD Alliance Welcomes Avery Design Systems to Member Community
MILPITAS, Calif., Feb. 25, 2020 (GLOBE NEWSWIRE) — The Electronic System Design Alliance, a SEMI Strategic Technology Community representing members in the electronic system and semiconductor design ecosystem, today welcomed Avery Design Systems as a member after its 10-member Governing Council approved Avery’s membership application. Already a member of SEMI, the global industry association representing the worldwide electronics product design…
Avery’s Partner Mobiveil Announces Availability of Compute Express Link (CXL) IP (COMPEX) for High-Performance Applications
MILPITAS, Calif., Feb. 24, 2020 (GLOBE NEWSWIRE) — Mobiveil, Inc., a fast-growing supplier of silicon intellectual property (SIP), platforms and IP-enabled design services, today announced availability of COMPEX Compute Express Link™ (CXL) IP. The COMPEX controller is designed to the CXL 1.1 specification and supports Host and Type 1, Type 2 and Type 3 device types.…
Avery Design Introduces CXL VIP
Tewksbury, MA., September 23, 2019 — Avery Design Systems, leader in functional verification solutions today announced CXL VIP supporting the latest CXL Specification 1.1 from the Compute Express Link (CXL) open standard. “Built upon our well-established PCI Express® (PCIe®) verification IP infrastructure, the CXL supports PCIe 5.0 physical and electrical interface (PIPE 5.1) to provide…
Avery Design Partners with Marquee Semiconductor to Provide Sales, Support in India, and Deepens its Relationship to Prime Marquee’s SoC Solution Platform
Tewksbury, MA., September 23, 2019 — Avery Design Systems, leader in functional verification solutions, and Marquee Semiconductor, a Spec-to-Silicon SOC solution company, today announced a broad joint collaboration to deliver innovative SOC solutions incorporating sales and support for Avery verification IP (VIP) and EDA products and Marquee design IP for analog/RF and NOC along with…
Avery Design Systems Announces SimAccel FPGA Accelerator
TEWKSBURY, MA., August 2, 2019 – Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced availability of the SimAccel FPGA-based accelerator to achieve 100-1000X speed up over simulation-based verification. “As SoCs get larger the feasibility of performing comprehensive SoC verification using purely simulation and without hardware-software co-verification is less and less…
Avery Design Systems Announces SimRegress and SimCompare
TEWKSBURY, MA., June 28, 2019 – Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced availability of SimRegress and SimCompare for improved simulation verification productivity. SimRegress provides the ability to capture and replay the simulation testbench stimulus without having to run the full testbench thus supporting improved methods for 3rd party…