Avery Design Systems Announces eMMC 5.0 Verification IP Solution
ANDOVER, MA., August 9, 2013 – Avery Design Systems Inc., a leader in verification IP (VIP), today announced availability of its eMMC 5.0 verification solution. eMMC-Xactor are complete verification solutions enabling design and verification engineers to quickly and extensively test the functionality of memory systems. The VIP includes: • Host and Device models • Compliance testsuite…
Avery Design Systems Announces SATA Express AHCI Verification IP Solution
ANDOVER, MA., August 9, 2013 – Avery Design Systems Inc., a leader in verification IP (VIP), today announced availability of its SATA Express/AHCI verification IP targeting the PCIe-based SSD market. SATA-Xactor extends Avery’s portfolio of storage-related VIP which also includes SATA, NVM Express, SCSI Express (SOP/PQI), Universal Flash Storage (UFS), eMMC, SD, and USB Attached SCSI…
Avery Design Systems Announces SCSI Express (SOP/PQI) Verification IP Solution
ANDOVER, MA., August 22, 2012 – Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced availability of its SCSI-Xactor verification IP targeting SCSI Express for high performance PCIe-based SSDs. SCSI-Xactor extends Avery’s portfolio of storage-related VIP which also includes NVM Express, USB Attached SCSI (UASP), USB Mass Storage Class Bulk-Only Transport (BOT),…
Avery Design Systems Adds NVM Express to Storage Standards Verification IP Solutions
ANDOVER, MA., May 29, 2012 – Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced availability of its NVM-Xactor verification IP targeting Non-Volatile Memory Express (NVMe) for high performance PCIe-based SSDs. NVM-Xactor extends Avery’s portfolio of storage-related VIP which also includes USB Attached SCSI (UASP), USB Mass Storage Class Bulk-Only Transport (BOT), MIPI…
Avery Design Systems Unveils DDR4 and DFI-PHY Verification IP Solution
ANDOVER, MA., March 22, 2012 – Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced availability of its DDR-Xactor verification IP providing DDR and LPDDR memory models and a complete DFI-PHY verification solution. DDR-Xactor VIP includes · SDRAM memory chip and DIMM models · DFI-PHY model · Simple AXI-based memory controller model · Compliance testsuite · Timing…
Avery Design Systems Unveils SimXACT for Elimination of X Pessimism Issues in Gate-Level Simulation and Upgrades XVER X Verification
ANDOVER, MA., March 22, 2012 – Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced availability of its revolutionary X verification solution, SimXACT, targeting comprehensive X propagation analysis including gate-level X pessimism analysis and automatic correction of gate-level simulation results, and XVER, X optimism analysis of RTL simulation. The inherent limitations of…
Avery Design Systems Announces MIPI UniPro and UFS Verification Solution
ANDOVER, MA., January 11, 2012 – Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced the MIPI-Xactor verification solution supporting the MIPI UniPro and M-PHY, and JEDEC UFS specifications. MIPI-Xactor is a complete verification solution consisting of SystemVerilog UVM/OVM/VMM compliant Bus Functional Models (BFM), protocol checkers, directed and random compliance test suites,…