PCI-Xactor is a comprehensive VIP solution portfolio for PCIe 4.0/3.1 used by SoC and IP designers to ensure comprehensive verification and protocol and timing compliance. PCI-Xactor implements a complete set of root complex, endpoint, switch, and SR-IOV models, protocol checkers, and compliance testsuites utilizing a truly flexible and open architecture based on a 100% native SystemVerilog and UVM implementation.


  • PCIe dual mode RC/EP, N-port switch, and PIPE 4.2 PHY driver BFMs

  • Compliance test suites

  • User Guide

Tech Specs

Short description:PCI Express 4.0/3.1 VIP (PCIe)
Provider:Avery Design Systems
Languages Supported:SystemVerilog, Vera, Verilog, VHDL, C
Compliant Standard:PCIe 4.0, 3.1, PIPE 4.3

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  • Dynamically configurable BFMs supporting root complex, endpoint, and switch. Compile once and select configuration at runtime as RC or EP

  • BFM randomly configures DUT during enumeration to test more supported configurations in less time such as randomizing equalization (coefficients, presets, reject coefficients) where many PHY layer issues are found

  • Root complex BFM mirrors DUT configuration enabling context-based validation

  • Inject errors at all layers using callbacks and packet operations such as nullify, drop, nak, field override, etc.

  • Transaction class and multi-function request/completion queues makes modeling large, high bandwidth, interleaved, delayed traffic request and completion streams easy. Stream TLPs based on random source request function and target memory and config space.

  • SV constraint set on all packet and transaction classes generates rich set of normal and error packets

  • Multi-level protocol trackers (TL, DLL, PL) makes debugging faster

  • Functional coverage tracks TLP/DLLP commands and device states

  • Comprehensive assertions track PCI-SIG compliance checklist coverage and isolate DUT bugs faster

  • Comprehensive directed and constrained random compliance testsuite achieves high protocol coverage

Additional Information:

   – Using the Avery BFM for PCI Express Gen3x16 Simulation on Intel® Stratix® 10 Devices