CCIX VIP

CCIX enables an entirely new class of high-performance datacenter
applications in areas of machine learning, network processing,
storage off-load, in-memory data base, and 4G/5G wireless
technology. Processor architectures and accelerators can now
seamlessly operate over cache coherent interconnect using the right
combination of general-purpose processors and heterogeneous
acceleration devices, such as FPGAs, GPUs, network/storage
adapters, intelligent networks, and custom ASICs.

Avery CCIX VIP provides a comprehensive verification solution
featuring an advanced UVM environment that incorporates
constrained random traffic generation; robust packet, link, and
physical layer controls and error injection; protocol checks and
coverage; functional coverage; protocol analyzer-like features for
debugging; and performance analysis metrics. With the advanced
capabilities of Avery VIP, you can work more efficiently, develop
more complex tests, and work on more complex topologies, such as
multi-path, multi-link solutions.


Avery compliance testsuites offer effective core-through-chip-level
tests, including those used in compliance workshops as well as
extended tests developed by Avery to cover the specification
features.


Deliverables



  • CCIX BFMs

  • Compliance testsuite

  • User Guide


Tech Specs









Short description:CCIX VIP
Provider:Avery Design Systems
Languages Supported:SystemVerilog, VHDL
Compliant Standard:CCIX
Maturity:Production
Availability:Now


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Features


  • CCIX home agent model incorporating configurable number of request and slave agents, interconnect, and directory agents

  • CCIX home agent model incorporating configurable number of request and slave agents, interconnect, and directory agents

  • Supports PCIe 4.0 VIP extended for CCIX transport layer features including the 25GT/s speed

  • Cache state trackers performs snoop response verification and transaction-level protocol trackers improve debug

  • Supports a transaction layer interface and CCIX-CCIX and CCIX-CHI bridging enabling unit-level verification by bypassing the PCIe layers

  • Cache coherency verification testsuite for CCIX and CHI systems

  • Protocol checking for CCIX Protocol and
    Transport layers

  • Performance measures for utilization

  • Comprehensive directed and constrained random compliance testsuite achieves high protocol coverage
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