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ESD Alliance Welcomes Avery Design Systems to Member Community

MILPITAS, Calif., Feb. 25, 2020 (GLOBE NEWSWIRE) — The Electronic System Design Alliance, a SEMI Strategic Technology Community representing members in the electronic system and semiconductor design ecosystem, today welcomed Avery Design Systems as a member after its 10-member Governing Council approved Avery’s membership application.

Already a member of SEMI, the global industry association representing the worldwide electronics product design and manufacturing chain, Avery wanted more involvement in the ESD Alliance because of its focus on the design community.

“Being part of SEMI’s broader mission and global reach is part of the ESD Alliance’s attraction to the design community,” states Chilai Huang, Avery’s president and chief executive officer. “For an emerging company such as Avery, the Export and License Management and Anti-Piracy Committees offer a central resource for informed information to address a variety of vexing issues.” Huang also noted the ability to receive the detailed Market Statistics Service (MSS) data as another resource to help Avery make engineering and business decisions.

“We welcome Avery into the ESD Alliance,” remarks Bob Smith, its executive director. “We expect to draw on Avery’s expertise and insights about the verification space to assist us with planning, educational networking events and other timely initiatives of interest and support to that growing community.”

About Avery Design Systems

Avery Design Systems enables system and SOC design teams to achieve dramatic functional verification productivity improvements through the use of

  • SimXACT and SymXprop formal analysis applications for gate-level and RTL X-pessimism verification and real X root cause and sequential backtracing
  • Robust core-through-chip-level Verification IP for PCI Express, CXL, Gen-Z, CCIX, USB, AMBA, Ethernet, UFS, MIPI CSI/DSI, I3C, DDR/LPDDR, HBM, ONFI/Toggle, NVM Express, SATA, AHCI, SAS, eMMC, SD/SDIO, CAN FD, and FlexRay standards
  • Accelerated verification through SimAccel FPGA-based simulation accelerator targeting NVMe SSD and PCIe designs and SimCluster GLS for gate-level parallel simulation

The Avery Design VIP Partner Program includes affiliations with numerous leading IP suppliers.

Engage with Avery at:
Website: www.avery-design.com
Twitter: @avery_design
LinkedIn

About the Electronic System Design Alliance

The Electronic System Design (ESD) Alliance, a SEMI Strategic Technology Community representing members in the electronic system and semiconductor design ecosystem, is a community that addresses technical, marketing, economic and legislative issues affecting the entire industry. It acts as the central voice to communicate and promote the value of the semiconductor design ecosystem as a vital component of the global electronics industry.

Follow the ESD Alliance
www.esd-alliance.org
ESD Alliance Bridging the Frontier blog
Twitter: @ESDAlliance
LinkedIn
Facebook

All trademarks and registered trademarks are the property of their respective owners.

For more information, contact:
Nanette Collins
Public Relations for the ESD Alliance
(617) 437-1822
nanette@nvc.com